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ltc3547 1 3547fa output current (ma) 30 efficiency (%) power loss (w) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3547 ta01b 0 1 0.1 0.01 0.001 0.0001 1 v in = 2.7v v in = 3.6v v in = 4.2v dual monolithic 300ma synchronous step-down regulator the ltc ? 3547 is a dual, 2.25mhz, constant-frequency, synchronous step-down dc/dc converter in a tiny 3mm 2mm dfn package. 100% duty cycle provides low drop- out operation, extending battery life in portable systems. low output voltages are supported with the 0.6v feed- back reference voltage. each regulator can supply 300ma continuous output current. the input voltage range is 2.5v to 5.5v, making it ideal for li-ion and usb powered applications. supply current dur- ing operation is only 40a and drops to < 1a in shutdown. automatic burst mode ? operation increases ef? ciency at light loads, further extending battery life. an internally set 2.25mhz switching frequency allows the use of tiny surface mount inductors and capacitors. internal soft-start reduces inrush current during start- up. all outputs are internally compensated to work with ceramic capacitors. the ltc3547 is available in a low pro? le (0.75mm) 3mm 2mm dfn package. the ltc3547 is also available in a ? xed output voltage con? guration, eliminating the need for the external feedback networks (see table 2). cellular telephones digital still cameras wireless and dsl modems pdas/palmtop pcs portable media players high ef? ciency dual step-down outputs: up to 96% 300ma output current per channel at v in = 3v automatic low ripple burst mode operation (20mv p-p ) only 40a quiescent current during operation (both channels) 2.25mhz constant-frequency operation 2.5v to 5.5v input voltage range low dropout operation: 100% duty cycle internally compensated for all ceramic capacitors independent internal soft-start for each channel current mode operation for excellent line and load transient response 0.6v reference allows low output voltages short-circuit protected ultralow shutdown current: i q < 1a low pro? le (0.75mm) 8-lead 3mm 2mm dfn package dual monolithic buck regulator in 8-lead 3mm 2mm dfn applicatio s u features descriptio u typical applicatio u , lt, ltc and ltm are registered trademarks of linear technology corporation. burst mode is a registered trademark of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, including 6580258, 5481178, 6304066, 6127815, 6498466, 6611131. v in run2 run1 ltc3547 v fb2 sw2 sw1 v fb1 10pf 10pf gnd v in 2.5v to 5.5v v out2 1.8v at 300ma v out1 2.5v at 300ma 3547 ta01 237k 150k 475k l2 4.7 h l1 4.7 h 475k 4.7 f 4.7 f 4.7 f ef? ciency vs output current for v out = 2.5v
ltc3547 2 3547fa v in ............................................................... C0.3v to 6v v fb1 , v fb2 ......................................... C0.3v to v in +0.3v run1, run2 ..................................... C0.3v to v in +0.3v sw1, sw2 (dc) ................................ C0.3v to v in +0.3v p-channel switch source current (dc) ...............500ma n-channel switch sink current (dc) ...................500ma peak sw sink and source current (note 5) .........700ma ambient operating temperature range ... C40c to 85c maximum junction temperature .......................... 125c storage temperature range ................... C65c to 125c (note 1) the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 3.6v, unless otherwise noted. symbol parameter conditions min typ max units v in v in operating voltage 2.5 5.5 v v uv v in undervoltage lockout v in low to high 2.0 2.5 v i fb feedback pin input current ltc3547, v fb = v fbreg ltc3547-1, v fb = v fbreg 3 30 6 na a v fbreg1 regulated feedback voltage (v fb1 ) ltc3547, 0c t a 85c ltc3547, C40c t a 85c ltc3547-1, 0c t a 85c ltc3547-1, C40c t a 85c 0.590 0.588 1.770 1.764 0.600 0.600 1.800 1.800 0.610 0.612 1.830 1.836 v v v v v fbreg2 regulated feedback voltage (v fb2 ) ltc3547, 0c t a 85c ltc3547, C40c t a 85c ltc3547-1, 0c t a 85c ltc3547-1, C40c t a 85c 0.590 0.588 1.180 1.176 0.600 0.600 1.200 1.200 0.610 0.612 1.220 1.224 v v v v v linereg reference voltage line regulation v in = 2.5v to 5.5v 0.3 0.5 %/v v loadreg output voltage load regulation i load = 0ma to 300ma 0.5 % i s input dc supply current active mode (note 3) sleep mode shutdown v fb1 = v fb2 = 0.95v v fbreg v fb1 = v fb2 = 1.05v v fbreg , v in = 5.5v run1 = run2 = 0v, v in = 5.5v 450 40 0.1 700 60 1 a a a f osc oscillator frequency v fb = 0.6v 1.8 2.25 2.7 mhz i lim peak switch current limit channel 1 (300ma) channel 2 (300ma) v in = 3v, v fb < v fbreg , duty cycle < 35% 400 400 550 550 ma ma electrical characteristics absolute axi u rati gs w ww u package/order i for atio uu w top view 9 ddb package 8-lead (3mm 2mm) plastic dfn 5 6 7 8 4 3 2 1 v fb1 run1 v in sw1 v fb2 run2 sw2 gnd t jmax = 125c, ja = 76c/w exposed pad (pin 9) is gnd must be soldered to pcb order part number ddb part marking ltc3547eddb ltc3547eddb-1 lcdp lcpc order options tape and reel: add #tr lead free: add #pbf lead free tape and reel: add #trpbf lead free part marking: http://www.linear.com/leadfree/ consult ltc marketing for parts speci? ed with wider operating temperature ranges.
ltc3547 3 3547fa v in (v) 2.5 100 90 80 70 60 50 40 30 45 3547 g02 3 3.5 4.5 5.5 efficiency (%) v out = 1.8v i out = 0.1ma i out = 1ma i out = 10ma i out = 100ma i out = 300ma temperature (?) ?0 60 50 55 45 40 35 30 25 20 25 75 3547 g03 ?5 0 50 100 supply current ( a) run1 = run2 = v in i load = 0a v in = 5.5v v in = 2.7v symbol parameter conditions min typ max units r ds(on) channel 1 (note 4) top switch on-resistance bottom switch on-resistance channel 2 (note 4) top switch on-resistance bottom switch on-resistance v in = 3.6v, i sw = 100ma v in = 3.6v, i sw = 100ma v in = 3.6v, i sw = 100ma v in = 3.6v, i sw = 100ma 0.8 0.75 0.8 0.75 1.05 1.05 1.05 1.05 i sw(lkg) switch leakage current v in = 5v, v run = 0v 0.01 1 a t softstart soft-start time v fb from 10% to 90% full-scale 0.450 0.650 0.850 ms v run run threshold high 0.4 1 1.2 v i run run leakage current 0.01 1 a v burst output ripple in burst mode operation v out = 1.5v, c out = 4.7f 20 mv p-p the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v cc = 3.6v, unless otherwise noted. electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3547e is guaranteed to meet speci? ed performance from 0c to 85c. speci? cations over the C40c and 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. note 4: the dfn switch on-resistance is guaranteed by correlation to wafer level measurements. note 5: guaranteed by long term current density limitations. note 6: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may impair device reliability. burst mode operation ef? ciency vs input voltage supply current vs temperature typical perfor a ce characteristics uw 2.5 s/div v out 50mv/div i l 50ma/div sw, ac coupled 5v/div 3547 g01 v in = 3.6v v out = 1.8v i load = 20ma
ltc3547 4 3547fa ef? ciency vs load current ef? ciency vs load current ef? ciency vs load current typical perfor a ce characteristics uw v in (v) 2.5 r ds(on) ( ? ) 4 3547 g08 0.9 0.8 0.6 3 3.5 4.5 0.5 0.4 1.0 0.7 5 5.5 6 synchronous switch main switch temperature ( c) ?0 r ds(on) ( ? ) 1.2 1.1 25 3547 g09 0.8 0.6 ?5 0 50 0.5 0.4 1.3 1.0 0.9 0.7 75 100 125 main switch synchronous switch v in = 2.7v v in = 3.6v v in = 4.2v output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3547 g10 0 1 v in = 2.7v v in = 3.6v v in = 4.2v v out = 1.2v output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3547 g11 0 1 v in = 2.7v v in = 3.6v v in = 4.2v v out = 1.8v temperature ( c) ?0 v fb (mv) 25 3547 g07 604 596 ?5 0 50 592 588 612 608 600 75 100 output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3547 g12 0 1 v in = 2.7v v in = 3.6v v in = 4.2v v out = 2.5v temperature ( c) ?0 frequency (mhz) 2.5 25 3547 g04 2.2 2.0 ?5 0 50 1.9 1.8 2.6 2.4 2.3 2.1 75 100 125 v in = 4.2v v in = 3.6v v in = 2.7v temperature ( c) ?0 leakage current (na) 25 3547 g05 40 20 ?5 0 50 10 0 50 30 75 100 125 synchronous switch main switch v in (v) 2.5 leakage current (pa) 4 3547 g06 400 200 3 3.5 4.5 100 0 500 300 5 5.5 6 synchronous switch main switch oscillator frequency vs temperature switch leakage vs temperature switch leakage vs input voltage reference voltage vs temperature r ds(on) vs input voltage r ds(on) vs temperature
ltc3547 5 3547fa 250 s/div i l 100ma/div run 2v/div v out 1v/div 3547 g15 v in = 3.6v v out = 1.8v i load = 0a load regulation line regulation start-up from shutdown start-up from shutdown load step load step load step typical perfor a ce characteristics uw 200 s/div i l 200ma/div run 2v/div v out 1v/div 3547 g16 v in = 3.6v v out = 1.8v i load = 300ma 10 s/div i l 200ma/div i load 200ma/div v out , ac coupled 100mv/div 3547 g19 v in = 3.6v v out = 1.8v i load = 50ma to 300ma 10 s/div i l 200ma/div i load 200ma/div v out , ac coupled 100mv/div 3547 g18 v in = 3.6v v out = 1.8v i load = 20ma to 300ma 10 s/div i l 200ma/div i load 200ma/div v out , ac coupled 100mv/div 3547 g17 v in = 3.6v v out = 1.8v i load = 0ma to 300ma load current (ma) 0 v out error (%) 150 3547 g13 0.8 0.6 0.2 50 100 200 0 ?.2 1.2 1.o 0.4 250 300 350 burst mode operation v out = 1.2v v out = 1.8v v out = 2.5v v in = 3.6v v in (v) 2.5 v out error (%) 4 3547 g14 0.4 0.2 ?.2 3 3.5 4.5 ?.4 ?.6 0.6 0 5 5.5 v out = 1.8v i load = 100ma
ltc3547 6 3547fa pi fu ctio s uuu v fb1 (pin 1): regulator 1 output feedback. receives the feedback voltage from the external resistor divider across the regulator 1 output. nominal voltage for this pin is 0.6v. run1 (pin 2): regulator 1 enable. forcing this pin to v in enables regulator 1, while forcing it to gnd causes regulator 1 to shut down. v in (pin 3): main power supply. must be closely decou- pled to gnd. sw1 (pin 4): regulator 1 switch node connection to the inductor. this pin swings from v in to gnd. gnd (pin 5): ground. connect to the (C) terminal of c out , and the (C) terminal of c in . sw2 (pin 6): regulator 2 switch node connection to the inductor. this pin swings from v in to gnd. run2 (pin 7): regulator 2 enable. forcing this pin to v in enables regulator 2, while forcing it to gnd causes regulator 2 to shut down. v fb2 (pin 8): regulator 2 output feedback. receives the feedback voltage from the external resistor divider across the regulator 2 output. nominal voltage for this pin is 0.6v. exposed pad (pin 9): electrically connected to gnd. must be soldered to the pcb for optimum thermal performance. + + ea + v sleep i th switching logic and blanking circuit s r q q rs latch burst + i comp i rcmp anti shoot- thru slope comp sleep 0.6v ref osc osc regulator 2 (identical to regulator 1) sleep1 sleep2 shutdown regulator 1 sw1 sw2 5 ? 3547 fd 1 2 7 8 run1 run2 v fb2 v fb1 4 v in 3 gnd 5 6 0.6v burst clamp soft-start functional diagram
ltc3547 7 3547fa operatio u the ltc3547 uses a constant-frequency current mode architecture. the operating frequency is set at 2.25mhz. both channels share the same clock and run in-phase. the output voltage is set by an external resistor divider returned to the v fb pins. an error ampli? er compares the divided output voltage with a reference voltage of 0.6v and regulates the peak inductor current accordingly. main control loop during normal operation, the top power switch (p-channel mosfet) is turned on at the beginning of a clock cycle when the v fb voltage is below the reference voltage. the current into the inductor and the load increases until the peak inductor current (controlled by i th ) is reached. the rs latch turns off the synchronous switch and energy stored in the inductor is discharged through the bottom switch (n-channel mosfet) into the load until the next clock cycle begins, or until the inductor current begins to reverse (sensed by the i rcmp comparator). the peak inductor current is controlled by the internally compensated i th voltage, which is the output of the er- ror ampli? er. this ampli? er regulates the v fb pin to the internal 0.6v reference by adjusting the peak inductor current accordingly. burst mode operation to optimize ef? ciency, the ltc3547 automatically switches from continuous operation to burst mode operation when the load current is relatively light. during burst mode op- eration, the peak inductor current (as set by i th ) remains ? xed at approximately 60ma and the pmos switch operates intermittently based on load demand. by running cycles periodically, the switching losses are minimized. the duration of each burst event can range from a few cycles at light load to almost continuous cycling with short sleep intervals at moderate loads. during the sleep intervals, the load current is being supplied solely from the output capacitor. as the output voltage droops, the error ampli? er output rises above the sleep threshold, signaling the burst comparator to trip and turn the top mosfet on. this cycle repeats at a rate that is dependent on load demand. dropout operation when the input supply voltage decreases toward the out- put voltage the duty cycle increases to 100%, which is the dropout condition. in dropout, the pmos switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal p-channel mosfet and the inductor. an important design consideration is that the r ds(on) of the p-channel switch increases with decreasing input supply voltage (see typical performance characteristics). therefore, the user should calculate the worst-case power dissipation when the ltc3547 is used at 100% duty cycle with low input voltage (see thermal considerations in the applications information section). soft-start in order to minimize the inrush current on the input by- pass capacitor, the ltc3547 slowly ramps up the output voltage during start-up. whenever the run1 or run2 pin is pulled high, the corresponding output will ramp from zero to full-scale over a time period of approximately 650s. this prevents the ltc3547 from having to quickly charge the output capacitor and thus supplying an exces- sive amount of instantaneous current. short-circuit protection when either regulator output is shorted to ground, the corresponding internal n-channel switch is forced on for a longer time period for each cycle in order to allow the inductor to discharge, thus preventing current runaway. this technique has the effect of decreasing switching frequency. once the short is removed, normal operation resumes and the regulator output will return to its nominal voltage. (refer to functional diagram )
ltc3547 8 3547fa applicatio s i for atio wu u u a general ltc3547 application circuit is shown in figure 1. external component selection is driven by the load requirement, and begins with the selection of the inductor l. once the inductor is chosen, c in and c out can be selected. inductor selection although the inductor does not in? uence the operat- ing frequency, the inductor value has a direct effect on ripple current. the inductor ripple current i l decreases with higher inductance and increases with higher v in or v out : ? i v fl v v l out o out in =? ? ? ? ? ? ? ? (1) accepting larger values of i l allows the use of low inductances, but results in higher output voltage ripple, greater core losses, and lower output current capability. a reasonable starting point for setting ripple current is 40% of the maximum output load current. so, for a 300ma regulator, i l = 120ma (40% of 300ma). the inductor value will also have an effect on burst mode operation. the transition to low current operation begins when the peak inductor current falls below a level set by the internal burst clamp. lower inductor values result in higher ripple current which causes the transition to occur at lower load currents. this causes a dip in ef? ciency in the upper range of low current operation. furthermore, lower inductance values will cause the bursts to occur with increased frequency. inductor core selection different core materials and shapes will change the size/current and price/current relationship of an induc- tor. toroid or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. the choice of which style inductor to use often depends more on the price vs size requirements, and any radiated ? eld/emi requirements, than on what the ltc3547 requires to operate. table 1 shows some typical surface mount inductors that work well in ltc3547 applications. figure 1. ltc3547 general schematic c f2 c f1 v in 2.5v to 5.5v v out2 v out1 3547 f01 r3 r1 r4 l2 l1 r2 c out2 c1 c out1 v in run2 run1 ltc3547 v fb2 sw2 sw1 v fb1 gnd table 1. representative surface mount inductors manu- facturer part number value max dc current dcr height taiyo yuden cb2016t2r2m cb2012t2r2m cb2016t3r3m 2.2h 2.2h 3.3h 510ma 530ma 410ma 0.13 0.33 0.27 1.6mm 1.25mm 1.6mm panasonic elt5kt4r7m 4.7h 950ma 0.2 1.2mm sumida cdrh2d18/ld 4.7h 630ma 0.086 2mm murata lqh32cn4r7m23 4.7h 450ma 0.2 2mm taiyo yuden nr30102r2m nr30104r7m 2.2h 4.7h 1100ma 750ma 0.1 0.19 1mm 1mm fdk FDKMIPF2520D FDKMIPF2520D FDKMIPF2520D 4.7h 3.3h 2.2h 1100ma 1200ma 1300ma 0.11 0.1 0.08 1mm 1mm 1mm tdk vlf3010at4r7- mr70 vlf3010at3r3- mr87 vlf3010at2r2- m1rd 4.7h 3.3h 2.2h 700ma 870ma 1000ma 0.24 0.17 0.12 1mm 1mm 1mm
ltc3547 9 3547fa applicatio s i for atio wu u u input capacitor (c in ) selection in continuous mode, the input current of the converter is a square wave with a duty cycle of approximately v out /v in . to prevent large voltage transients, a low equiv- alent series resistance (esr) input capacitor sized for the maximum rms current must be used. the max- imum rms capacitor current is given by: ii vvv v rms max out in out in ? () where the maximum average output current i max equals the peak current minus half the peak-to-peak ripple cur- rent, i max = i lim C i l /2. this formula has a maximum at v in = 2v out , where i rms = i out /2. this simple worst-case is commonly used to design because even signi? cant deviations do not offer much relief. note that capacitor manufacturers ripple cur- rent ratings are often based on only 2000 hours lifetime. this makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. several capacitors may also be paralleled to meet the size or height requirements of the design. an addi- tional 0.1f to 1f ceramic capacitor is also recommended on v in for high frequency decoupling when not using an all-ceramic capacitor solution. output capacitor (c out ) selection the selection of c out is driven by the required effective series resistance (esr). typically, once the esr require- ment for c out has been met, the rms current rating generally far exceeds the i ripple(p-p) requirement. the output ripple v out is determined by: ??? + ? ? ? ? ? ? viesr fc out l out 1 8 where f = operating frequency, c out = output capacitance and i l = ripple current in the inductor. for a ? xed output voltage, the output ripple is highest at maximum input voltage since i l increases with input voltage. if tantalum capacitors are used, it is critical that the capaci- tors are surge tested for use in switching power supplies. an excellent choice is the avx tps series of surface mount tantalum. these are specially constructed and tested for low esr so they give the lowest esr for a given volume. other capacitor types include sanyo poscap, kemet t510 and t495 series, and sprague 593d and 595d series. consult the manufacturer for other speci? c recommendations. using ceramic input and output capacitors higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. their high ripple current, high voltage rating and low esr make them ideal for switching regulator applications. because the ltc3547 control loop does not depend on the output capacitors esr for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. however, care must be taken when ceramic capacitors are used at the input. when a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, v in . at best, this ringing can couple to the output and be mistaken as loop instability. at worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at v in , large enough to damage the part. for more information, see application note 88. when choosing the input and output ceramic capacitors, choose the x5r or x7r dielectric formulations. these dielectrics have the best temperature and voltage charac- teristics of all the ceramics for a given value and size. (2) (3)
ltc3547 10 3547fa applicatio s i for atio wu u u setting the output voltage the ltc3547 regulates the v fb1 and v fb2 pins to 0.6v during regulation. thus, the output voltage is set by a resistive divider according to the following formula: vv r r out =+ ? ? ? ? ? ? 06 1 2 1 . (4) keeping the current small (< 5a) in these resistors maxi- mizes ef? ciency, but making it too small may allow stray capacitance to cause noise problems or reduce the phase margin of the error amp loop. to improve the frequency response of the main control loop, a feedback capacitor (c f ) may also be used. great care should be taken to route the v fb line away from noise sources, such as the inductor or the sw line. fixed output versions of the ltc3547 (e.g. ltc3547-1) include an internal resistive divider, eliminating the need for external resistors. the resistor divider is chosen such that the v fb input current is 3a. for these versions the v fb pin should be connected directly to v out . table 2 lists the ? xed output voltages available for the ltc35476-1. table 2. fixed output voltage versions part number v out1 v out2 ltc3547 adjustable adjustable ltc3547-1 1.8v 1.2v checking transient response the regulator loop response can be checked by looking at the load transient response. switching regulators take several cycles to respond to a step in load current. when a load step occurs, v out immediately shifts by an amount equal to i load ? esr, where esr is the effective series resistance of c out . i load also begins to charge or dis- charge c out generating a feedback error signal used by the regulator to return v out to its steady-state value. during this recovery time, v out can be monitored for overshoot or ringing that would indicate a stability problem. the initial output voltage step may not be within the band- width of the feedback loop, so the standard second-order overshoot/dc ratio cannot be used to determine the phase margin. in addition, feedback capacitors (c f1 and c f2 ) can be added to improve the high frequency response, as shown in figure 1. capacitor c f provides phase lead by creating a high frequency zero with r2 which improves the phase margin. the output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. for a detailed explanation of optimizing the compensation components, including a re- view of control loop theory, refer to application note 76. in some applications, a more severe transient can be caused by switching in loads with large (>1f) input ca- pacitors. the discharged input capacitors are effectively put in parallel with c out , causing a rapid drop in v out . no regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. the solution is to limit the turn-on speed of the load switch driver. a hot swap ? controller is designed speci? cally for this purpose and usually in- corporates current limiting, short-circuit protection, and soft-starting. hot swap is a trademark of linear technology corporation.
ltc3547 11 3547fa applicatio s i for atio wu u u ef? ciency considerations the percent ef? ciency of a switching regulator is equal to the output power divided by the input power times 100%. it is often useful to analyze individual losses to determine what is limiting the ef? ciency and which change would produce the most improvement. percent ef? ciency can be expressed as: % ef? ciency = 100% C (l1 + l2 + l3 + ...) where l1, l2, etc., are the individual losses as a percent- age of input power. although all dissipative elements in the circuit produce losses, four sources usually account for the losses in ltc3547 circuits: 1) v in quiescent current, 2) switching losses, 3) i 2 r losses, 4) other system losses. 1) the v in current is the dc supply current given in the electrical characteristics which excludes mosfet driver and control currents. v in current results in a small (<0.1%) loss that increases with v in , even at no load. 2) the switching current is the sum of the mosfet driver and control currents. the mosfet driver current re- sults from switching the gate capacitance of the power mosfets. each time a mosfet gate is switched from low to high to low again, a packet of charge dq moves from v in to ground. the resulting dq/dt is a current out of v in that is typically much larger than the dc bias cur- rent. in continuous mode, i gatechg = f o (q t + q b ), where q t and q b are the gate charges of the internal top and bottom mosfet switches. the gate charge losses are proportional to v in and thus their effects will be more pronounced at higher supply voltages. 3) i 2 r losses are calculated from the dc resistances of the internal switches, r sw , and external inductor, r l . in continuous mode, the average output current ? ows through inductor l, but is chopped between the internal top and bottom switches. thus, the series resistance looking into the sw pin is a function of both top and bottom mosfet r ds(on) and the duty cycle (dc) as follows: r sw = (r ds(on)top ) ? (dc) + (r ds(on)bot ) ? (1C dc) (5) the r ds(on) for both the top and bottom mosfets can be obtained from the typical performance character- istics curves. thus, to obtain i 2 r losses: i 2 r losses = i out 2 ? (r sw + r l ) 4) other hidden losses, such as copper trace and in- ternal battery resistances, can account for additional ef? ciency degradations in portable systems. it is very important to include these system level losses in the design of a system. the internal battery and fuse resistance losses can be minimized by making sure that c in has adequate charge storage and very low esr at the switching frequency. other losses, including diode conduction losses during dead-time, and inductor core losses, generally account for less than 2% total additional loss.
ltc3547 12 3547fa applicatio s i for atio wu u u thermal considerations in a majority of applications, the ltc3547 does not dis- sipate much heat due to its high ef? ciency. in the unlikely event that the junction temperature somehow reaches approximately 150c, both power switches will be turned off and the sw node will become high impedance. the goal of the following thermal analysis is to determine whether the power dissipated causes enough temperature rise to exceed the maximum junction temperature (125c) of the part. the temperature rise is given by: t rise = p d ? ja (6) where p d is the power dissipated by the regulator and ja is the thermal resistance from the junction of the die to the ambient temperature. the junction temperature, t j , is given by: t j = t rise + t ambient (7) as a worst-case example, consider the case when the ltc3547 is in dropout on both channels at an input volt- age of 2.7v with a load current of 300ma and an ambi- ent temperature of 70c. from the typical performance characteristics graph of switch resistance, the r ds(on) of the main switch is 0.9 . therefore, power dissipated by each channel is: p d = i out 2 ? r ds(on) = 81mv given that the thermal resistance of a properly soldered dfn package is approximately 76c/w, the junction temperature of an ltc3547 device operating in a 70c ambient temperature is approximately: t j = (2 ? 0.081w ? 76c/w) + 70c = 82.3c which is well below the absolute maximum junction tem- perature of 125c. pc board layout considerations when laying out the printed circuit board, the following checklist should be used to ensure proper operation of the ltc3547. these items are also illustrated graphically in the layout diagrams of figures 2 and 3. check the fol- lowing in your layout: 1. does the capacitor c in connect to the power v in (pin 3) and gnd (pin 5) as closely as possible? this capacitor provides the ac current of the internal power mosfets and their drivers. 2. are the respective c out and l closely connected? the (C) plate of c out returns current to gnd and the (C) plate of c in . 3. the resistor divider, r1 and r2, must be connected between the (+) plate of c out1 and a ground sense line terminated near gnd (pin 5). the feedback sig- nals v fb1 and v fb2 should be routed away from noisy components and traces, such as the sw lines (pins 4 and 6), and their trace length should be minimized. 4. keep sensitive components away from the sw pins if possible. the input capacitor c in and the resistors r1, r2, r3 and r4 should be routed away from the sw traces and the inductors. 5. a ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the gnd pin at a single point. these ground traces should not share the high current path of c in or c out . 6. flood all unused areas on all layers with copper. flood- ing with copper will reduce the temperature rise of power components. these copper areas should be connected to v in or gnd.
ltc3547 13 3547fa figure 3. ltc3547 suggested layout figure 2. ltc3547 layout diagram (see board layout checklist) v in run2 run1 ltc3547 v fb2 sw2 sw1 v fb1 c f2 c f1 gnd v in 2.5v to 5.5v v out2 v out1 3547 f02 r3 r1 r4 l2 l1 r2 c out2 c1 c out1 bold lines indicate high current paths applicatio s i for atio wu u u 3547 f03 c f2 via to v in r4 r3 c f2 r2 r1 via to v out2 v out2 c out2 c in c out1 v out1 v fb1 v fb2 gnd via to gnd sw2 l2 sw1 l1 via to v out1 via to gnd v in
ltc3547 14 3547fa applicatio s i for atio wu u u design example as a design example, consider using the ltc3547 in a portable application with a li-ion battery. the battery provides a v in ranging from 2.8v to 4.2v. the load on each channel requires a maximum of 300ma in active mode and 2ma in standby mode. the output voltages are v out1 = 2.5v and v out2 = 1.8v. start with channel 1. first, calculate the inductor value for about 40% ripple current (120ma in this example) at maximum v in . using a derivation of equation 1: l v mhz ma v v 1 25 2 25 120 1 25 42 37 =? ? ? ? ? ? ? = . .() . . .5 5 h for the inductor, use the closest standard value of 4.7h. a 4.7f capacitor should be more than suf? cient for this output capacitor. as for the input capacitor, a typical value of c in = 4.7f should suf? ce, as the source impedance of a li-ion battery is very low. the feedback resistors program the output voltage. to maintain high ef? ciency at light loads, the current in these resistors should be kept small. choosing 2a with the 0.6v feedback voltage makes r1~300k. a close standard 1% resistor is 280k. using equation 4: r v rk out 2 06 1 1 887 =? ? ? ? ? ? ? = . an optional 10pf feedback capacity (c f1 ) may be used to improve transient response. using the same analysis for channel 2 (v out2 = 1.8v), the results are: l2 = 3.81h r3 = 280k r4 = 560k figure 4 shows the complete schematic for this example, along with the ef? ciency curve and transient response. figure 4a. design example circuit figure 4b. ef? ciency vs output current v in run2 run1 ltc3547 v fb2 sw2 sw1 v fb1 c f2 , 10pf c f1 , 10pf gnd v in 2.5v to 5.5v v out2 1.8v at 300ma v out1 2.5v at 300ma 3547 f04a r3 280k r1 280k r4 562k l2 4.7 h l1 4.7 h r2 887k c out2 4.7 f c1 4.7 f c out1 4.7 f c1, c2, c3: taiyo yuden jmk316bj475ml l1, l2: murata lqh32cn4r7m33 output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 3547 f04b 0 1 v in = 2.7v v in = 3.6v v in = 4.2v v out = 2.5v output current (ma) 30 efficiency (%) 90 100 20 10 80 50 70 60 40 0.1 10 100 1000 0 1 v in = 2.7v v in = 3.6v v in = 4.2v v out = 1.8v
ltc3547 15 3547fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. figure 4c. transient response applicatio s i for atio wu u u package descriptio u ddb package 8-lead plastic dfn (3mm 2mm) (reference ltc dwg # 05-08-1702 rev b) 2.00 0.10 (2 sides) note: 1. drawing conforms to version (wecd-1) in jedec package outline m0-229 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package 0.40 0.10 bottom view?xposed pad 0.56 0.05 (2 sides) 0.75 0.05 r = 0.115 typ r = 0.05 typ 2.15 0.05 (2 sides) 3.00 0.10 (2 sides) 1 4 8 5 pin 1 bar top mark (see note 6) 0.200 ref 0 ?0.05 (ddb8) dfn 0905 rev b 0.25 0.05 2.20 0.05 (2 sides) recommended solder pad pitch and dimensions 0.61 0.05 (2 sides) 1.15 0.05 0.70 0.05 2.55 0.05 package outline 0.25 0.05 0.50 bsc pin 1 r = 0.20 or 0.25 45 chamfer 0.50 bsc 10 s/div i l 200ma/div i load 200ma/div v out , ac coupled 100mv/div v in = 3.6v v out = 1.8v i load = 20ma to 300ma 10 s/div i l 200ma/div i load 200ma/div v out , ac coupled 100mv/div 3547 f04c v in = 3.6v v out = 2.5v i load = 20ma to 300ma
ltc3547 16 3547fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2006 lt 0906 rev a ? printed in usa part number description comments ltc3405/ltc3405a 300ma (i out ), 1.5mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out = 0.8v, i q = 20a, i sd <1a, thinsot tm package ltc3406/ltc3406b 600ma (i out ), 1.5mhz, synchronous step-down dc/dc converter 96% ef? ciency, v in : 2.5v to 5.5v, v out = 0.6v, i q = 20a, i sd <1a, thinsot package ltc3407/ltc3407-2 dual 600ma/800ma (i out ), 1.5mhz/2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out = 0.6v, i q = 40a, i sd <1a, ms10e, dfn packages ltc3409 600ma (i out ), 1.7mhz/2.6mhz, synchronous step-down dc/dc converter 96% ef? ciency, v in : 1.6v to 5.5v, v out = 0.6v, i q = 65a, i sd <1a, dfn package ltc3410/ltc3410b 300ma (i out ), 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out = 0.8v, i q = 26a, i sd <1a, sc70 package ltc3411 1.25a (i out ), 4mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out = 0.8v, i q = 60a, i sd <1a, ms10, dfn packages ltc3531/ltc3531-3/ ltc3531-3.3 200ma (i out ), 1.5mhz, synchronous buck-boost dc/dc converter 95% ef? ciency, v in : 1.8v to 5.5v, v out : 2v to 5v, i q = 16a, i sd <1a, thinsot, dfn packages ltc3532 500ma (i out ), 2mhz, synchronous buck-boost dc/dc converter 95% ef? ciency, v in : 2.4v to 5.5v, v out : 2.4v to 5.25v, i q = 35a, i sd <1a, ms10, dfn packages ltc3548/ltc3548-1/ ltc3548-2 dual 400ma and 800ma (i out ), 2.25mhz, synchronous step-down dc/dc converter 95% ef? ciency, v in : 2.5v to 5.5v, v out = 0.6v, i q = 40a, i sd <1a, ms10e, dfn packages thinsot is a trademark of linear technology corporation typical applicatio u related parts v in run2 run1 ltc3547 v fb2 sw2 sw1 v fb1 c f2 , 10pf c f1 , 10pf gnd v in 2.5v to 5.5v v out2 1.8v at 300ma v out1 2.5v at 300ma 3547 ta02 r3 280k r1 280k r4 562k l2 4.7 h l1 4.7 h r2 887k c out2 4.7 f c1 4.7 f c out1 4.7 f c1, c2, c3: taiyo yuden jmk316bj475ml l1, l2: murata lqh32cn4r7m33 dual 300ma buck converter v in run2 run1 ltc3547-1 v fb2 sw2 sw1 v fb1 gnd v in 2.5v to 5.5v v out2 1.2v at 300ma v out1 1.8v at 300ma 3547 ta03 l2 4.7 h l1 4.7 h c out2 4.7 f c1 4.7 f c out1 4.7 f c1, c out1 , c out2 : taiyo yuden jmk316bj475ml l1, l2: murata lqh32cn4r7m33 1.8v/1.2v dual 300ma buck converter

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